T8110B ICS Triplex Trusted TMR Processor
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Vendor:
ICS Triplex
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Type:
TMR Processor
- Tags Ics triplex , Tmr processor
About the Product
T8110B ICS Triplex Trusted TMR Processor
| Parameter | Details |
|---|---|
| Input Power Requirements |
|
| Thermal Information | Heat Dissipation: 80 W (Typical) |
| Operating Conditions |
|
| Memory and Data Storage | DRAM: 16 MB EDO, 60 ns access time EPROM: 512 kB FLASH: 2 MB NVRAM: 128 kB for retained variables Variable Storage Requirements: - 1 Byte for Booleans - 4 Bytes for Analog variables - 5 Bytes for Timer data |
| Processor Specifications | Processor Clock Speed: 100 MHz |
| Event Buffering and Storage | SOE Buffer: Holds up to 1,000 events, with transfer to a Controller Interface buffer capable of storing 4,000 events |
| Physical Specifications |
|
| I/O and Communication Interface | Triple Redundant Inter-Module Bus (TMR Configuration) for high-availability communication across modules Recommended Chassis: T8100 for optimal performance and integration |
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